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8285es?avr?02/2013 features ? high performance, low power atmel ? avr ? 8-bit microcontroller ? advanced risc architecture ? 130 powerful instructions ? most single clock cycle execution ? 32 8 general purpose working registers ? fully static operation ? up to 16mips throughput at 16mhz (atmel atmega165pa/645p) ? up to 20mips throughput at 20mhz (atmel at mega165a/325a/325pa/645a/ 3250a/3250pa/6450a/6450p) ? on-chip 2-cycle multiplier ? high endurance non-volatile memory segments ? in-system self-programmable flash program memory ? 16kbytes (atmega165a/atmega165pa) ? 32kbytes (atmega325a/atmega325pa/atmega3250a/atmega3250pa) ? 64kbytes (atmega645a/atmega645p/atmega6450a/atmega6450p) ?eeprom ? 512bytes (atmega165a/atmega165pa) ? 1kbytes (atmega325a/atmega325pa/atmega3250a/atmega3250pa) ? 2kbytes (atmega645a/atmega645p/atmega6450a/atmega6450p) ? internal sram ? 1kbytes (atmega165a/atmega165pa) ? 2kbytes (atmega325a/atmega325pa/atmega3250a/atmega3250pa) ? 4kbytes (atmega645a/atmega645p/atmega6450a/atmega6450p) ? write/erase cycles: 10,000 flash/100,000 eeprom ? data retention: 20 years at 85c/100 years at 25 ? c (1) ? optional boot code section with independent lock bits ? in-system programming by on-chip boot program ? true read-while-write operation ? programming lock for software security ? atmel qtouch ? library support ? capacitive touch buttons, sliders and wheels ? atmel qtouch and qmatrix acquisition ? up to 64 sense channels ? jtag (ieee std. 1149.1 compliant) interface ? boundary-scan capabilities according to the jtag standard ? extensive on-chip debug support ? programming of flash, eeprom, fuses, a nd lock bits through the jtag interface ? peripheral features ? two 8-bit timer/counters with separate prescaler and compare mode ? one 16-bit timer/counter with separate prescaler, compare mode, and capture mode ? real time counter with separate oscillator ? four pwm channels ? 8-channel, 10-bit adc ? programmable serial usart ? master/slave spi serial interface ? universal serial interface with start condition detector ? programmable watchdog timer with separate on-chip oscillator ? on-chip analog comparator ? interrupt and wake-up on pin change ? special microcontroller features ? power-on reset and programmable brown-out detection ? internal calibrated oscillator ? external and internal interrupt sources ? five sleep modes: idle, adc noise reducti on, power-save, power-down and standby ? i/o and packages ? 54/69 programmable i/o lines ? 64/100-lead tqfp, 64-pad qfn/mlf and 64-pad drqfn ? speed grade: ? atmega 165a/165pa/645a/645p: 0 - 16mhz @ 1.8 - 5.5v ? atmega325a/325pa/3250a/3250pa/6450a/6450p: 0 - 20mhz @ 1.8 - 5.5v ? temperature range: ? -40c to 85 ? c industrial ? ultra-low power consumption (picopower ? devices) ?active mode: ? 1mhz, 1.8v: 215a ? 32khz, 1.8v: 8a (including oscillator) ? power-down mode: 0.1a at 1.8v ? power-save mode: 0.6a at 1.8v (including 32khz rtc) note: 1. reliability qualification results show that the projected data retention failure rate is much less than 1 ppm over 20 years at 85c or 100 years at 25c. atmel atmega165a/pa/325a/pa/3250a/pa/645a/p/6450a/p 8-bit atmel microcontroller with 16/ 32/64kb in-system programmable flash summary
2 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 1. pin configurations 1.1 pinout - tqfp and qfn/mlf figure 1-1. 64a (tqfp)and 64m1 (qfn/mlf) pinout atmel atmega165a/atmega165pa/atmega325a/atmega325pa/atmega645a/atmega645p. note: the large center pad underneath the qfn/mlf packages is made of metal and internally connected to gnd. it should be sol- dered or glued to the board to ensure good mechanical stability. if the center pad is left unconnected, the package might loose n from the board. 64 63 62 47 46 48 45 44 43 42 41 40 39 38 37 36 35 33 34 2 3 1 4 5 6 7 8 9 10 11 12 13 14 16 15 17 61 60 18 59 20 58 19 21 57 22 56 23 55 24 54 25 53 26 52 27 51 29 28 50 49 32 31 30 pc0 vcc gnd pf0 (adc0) pf7 (adc7/tdi) pf1 (adc1) pf2 (adc2) pf3 (adc3) pf4 (adc4/tck) pf5 (adc5/tms) pf6 (adc6/tdo) aref gnd avcc (rxd/pcint0) pe0 (txd/pcint1) pe1 dnc (xck/ain0/pcint2) pe2 (ain1/pcint3) pe3 (usck/scl/pcint4) pe4 (di/sda/pcint5) pe5 (do/pcint6) pe6 (clko/pcint7) pe7 (ss/pcint8) pb0 (sck/pcint9) pb1 (mosi/pcint10) pb2 (miso/pcint11) pb3 (oc0a/pcint12) pb4 (oc2a/pcint15) pb7 (t1) pg3 (oc1b/pcint14) pb6 (t0) pg4 (oc1a/pcint13) pb5 pc1 pg0 pd7 pc2 pc3 pc4 pc5 pc6 pc7 pa7 pg2 pa6 pa5 pa4 pa3 pa0 pa1 pa2 pg1 pd6 pd5 pd4 pd3 pd2 (int0) pd1 (icp1) pd0 (tosc1) xtal1 (tosc2) xtal2 reset/pg5 gnd vcc index corner
3 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 1.2 pinout - 100a (tqfp) figure 1-2. pinout atmel atmega3250a/atmega3250pa/atmega6450a/atmega6450p. (oc2a/pcint15) pb7 dnc (t1) pg3 (t0) pg4 reset/pg5 vcc gnd (tosc2) xtal2 (tosc1) xtal1 dnc dnc (pcint26) pj2 (pcint27) pj3 (pcint28) pj4 (pcint29) pj5 (pcint30) pj6 dnc (icp1) pd0 (int0) pd1 pd2 pd3 pd4 pd5 pd6 pd7 avcc agnd aref pf0 (adc0) pf1 (adc1) pf2 (adc2) pf3 (adc3) pf4 (adc4/tck) pf5 (adc5/tms) pf6 (adc6/tdo) pf7 (adc7/tdi) dnc dnc ph7 (pcint23) ph6 (pcint22) ph5 (pcint21) ph4 (pcint20) dnc dnc gnd vcc dnc pa0 pa1 pa2 pa3 pa4 pa 5 pa6 pa7 pg2 pc7 pc6 dnc ph3 (pcint19) ph2 (pcint18) ph1 (pcint17) ph0 (pcint16) dnc dnc dnc dnc pc5 pc4 pc3 pc2 pc1 pc0 pg1 pg0 index corner 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 dnc (rxd/pcint0) pe0 (txd/pcint1) pe1 (xck/ain0/pcint2) pe2 (ain1/pcint3) pe3 (usck/scl/pcint4) pe4 (di/sda/pcint5) pe5 (do/pcint6) pe6 (clko/pcint7) pe7 vcc gnd dnc (pcint24) pj0 (pcint25) pj1 dnc dnc dnc dnc (ss/pcint8) pb0 (sck/pcint9) pb1 (mosi/pcint10) pb2 (miso/pcint11) pb3 (oc0a/pcint12) pb4 (oc1a/pcint13) pb5 (oc1b/pcint14) pb6 tqfp
4 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 2. overview the atmel atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p is a low-power cmos 8-bit micro- controller based on the avr enhanced risc architecture. by ex ecuting powerful instructions in a single clock cycle, this microcontroller achieves throughputs approaching 1 mips per mhz allowing the system designer to optimize power con- sumption versus processing speed. 2.1 block diagram figure 2-1. block diagram. the avr core combines a rich instruction set with 32 general purpose working registers. all the 32 registers are directly connected to the arithmetic logic unit (alu), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. the result ing architecture is more c ode efficient while achieving throughputs up to ten times faster than conventional cisc microcontrollers. program cou n ter i n ter n al oscillator watchdog timer stack poi n ter program flash mcu co n trol register sram ge n eral purpose registers i n structio n register timer/ cou n ters i n structio n decoder data dir. reg. portb data dir. reg. porte data dir. reg. porta data dir. reg. portd data register portb data register porte data register porta data register portd timi n g a n d co n trol oscillator i n terrupt u n it eeprom spi usart status register z y x alu portb dri v ers porte dri v ers porta dri v ers portf dri v ers portd dri v ers portc dri v ers pb0 - pb7 pe0 - pe7 pa0 - pa7 pf0 - pf7 v cc g n d xtal1 xtal2 co n trol li n es + - a n alog comparator pc0 - pc7 8 -bit data bus reset calib. osc data dir. reg. portc data register portc o n -chip debug jtag tap programmi n g logic bou n dary- sca n data dir. reg. portf data register portf adc pd0 - pd7 data dir. reg. portg data reg. portg portg dri v ers pg0 - pg4 ag n d aref a v cc u n i v ersal serial i n terface a v r cpu porth dri v ers ph0 - ph7 data dir. reg. porth data register porth portj dri v ers pj0 - pj6 data dir. reg. portj data register portj
5 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 the atmel atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p provides the following fea- tures: 16k/32k/64k bytes of in-system programmable flash with read- w hile- w rite capabilities, 512/1k/2k bytes eeprom, 1k/2k/4k byte sram, 54/69 general purpose i/o lines, 32 general purpose working registers, a jtag interface for boundary-scan, on-chip debugging support and programming, three flexible timer/counters with compare modes, internal and external interrupts, a serial programmable usart, universal serial interface with start condition detector, an 8-channel, 10-bit adc, a programmable w atchdog timer with internal oscillator, an spi serial port, and five software selectable power saving modes. the idle mode stops the cpu while allowing the sram, timer/counters, spi port, and interrupt system to continue functioning. the power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. in power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sle eping. the adc noise reduction mode stops the cpu and all i/o modules except asynchronous timer and adc, to mini mize switching noise during adc conversions. in standby mode, the xtal/resonator oscillator is running wh ile the rest of the device is sleeping. this allows very fast start-up com- bined with low-powe r consumption. atmel offers the qtouch ? library for embedding capacitive touch buttons, sliders and wheels functionality into avr microcontrollers. the patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and in cludes adjacent key suppression ? (aks ? ) technology for unambiguous detection of key events. the easy-to-use qtouch suite toolchain allows you to explore, develop and debug your own touch applications. the device is manufactured using atmel?s high density non- volatile memory technology. the on-chip isp flash allows the program memory to be reprogrammed in-system through an spi serial interface, by a conventional non- volatile memory programmer, or by an on-chip boot program running on the avr core. the boot program can use any interface to download the application program in the application flash memory. software in the boot flash section will continue to run while the applicatio n flash section is updated, providing true read- w hile- w rite opera- tion. by combining an 8-bit risc cpu with in-system self-programmable flash on a monolithic chip, the atmel devise is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/ 645p/6450a/6450p avr is supported with a full suite of program and system development tools including: c compilers, macro assemblers, program debug- ger/simulators, in-circuit emulators, and evaluation kits.
6 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 2.2 comparison between atmel atmega165a/165pa/325a/325pa/3250a/ 3250pa/645a/645 p/6450a/6450p 2.3 pin descriptions 2.3.1 vcc digital supply voltage. 2.3.2 gnd ground. 2.3.3 port a (pa7:pa0) port a is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port a output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port a pins that are externally pulled low will source current if the pull-up resistor s are activated. the port a pins are tri-stated when a reset condition becomes active, even if the clock is not running. port a also serves the functions of various special features of the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on ?alternate functions of port b? on page 68 . 2.3.4 port b (pb7:pb0) port b is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port b output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port b pins that are externally pulled low will source current if the pull-up resistor s are activated. the port b pins are tri-stated when a reset condition becomes active, even if the clock is not running. port b has better driving c apabilities than th e other ports. port b also serves the functions of various special features of the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on ?alternate functions of port b? on page 68 . 2.3.5 port c (pc7:pc0) port c is an 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port c output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port c pins that are table 2-1. differences between: atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p. device flash eeprom ram mhz atmega165a 16kbyte 512bytes 1kbyte 16 atmega165pa 16kbyte 512bytes 1kbyte 16 atmega325a 32kbyte 1kbyte 2kbyte 20 atmega325pa 32kbyte 1kbyte 2kbyte 20 atmega3250a 32kbytes 1kbyte 2kbyte 20 atmega3250pa 32kbyte 1kbyte 2kbyte 20 atmega645a 64kbyte 2kbyte 4kbyte 16 atmega645p 64kbyte 2kbyte 4kbyte 16 atmega6450a 64kbyte 2kbyte 4kbyte 20 atmega6450p 64kbyte 2kbyte 4kbyte 20
7 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 externally pulled low will source current if the pull-up resistors are activate d. the port c pins are tri-stated when a reset condition becomes active, even if the clock is not running. port c also serves the functions of special features of the atmel atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on ?alternate functions of port d? on page 70 . 2.3.6 port d (pd7:pd0) port d is an 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port d output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port d pins that are externally pulled low will source current if the pull-up resistors are activate d. the port d pins are tri-stated when a reset condition becomes active, even if the clock is not running. port d also serves the functions of various special features of the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on ?alternate functions of port d? on page 70 . 2.3.7 port e (pe7:pe0) port e is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port e output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port e pins that are externally pulled low will source current if the pull-up resistor s are activated. the port e pins are tri-stated when a reset condition becomes active, even if the clock is not running. port e also serves the functions of various special features of the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on ?alternate functions of port e? on page 71 . 2.3.8 port f (pf7:pf0) port f serves as the analog inputs to the a/d converter. port f also serves as an 8-bit bi-directional i/o port, if the a/d converter is not used. port pins can provide internal pull-up resistors (selected for each bit). the port f output buffers have symmetrical drive characteristics with both high sink and source capabilit y. as inputs, port f pins that are externa lly pulled low will source current if the pull-up resistors are activated. the port f pins are tri-stated when a reset condition becomes active, even if the clock is not running. if the jtag interface is en abled, the pull-up resistors on pins pf7(tdi), pf5(tms), and pf4(tck) will be activated even if a reset occurs. port f also serves the functions of the jtag interface, see ?alternate functions of port f? on page 73 . 2.3.9 port g (pg5:pg0) port g is a 6-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port g output buf- fers have symmetrical drive characteristic s with both high sink and source capability. as inpu ts, port g pins that are externally pulled low will source current if the pull-up resistors are activated. the port g pins are tri-stated when a reset condition becomes active, even if the clock is not running. port g also serves the functions of various special features of the atmega165a/165pa/325a/325pa/3250a/3250pa/645a/645p/6450a/6450p as listed on page 75 . 2.3.10 port h (ph7:ph0) port h is a 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port h output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port h pins that are externally pulled low will source current if the pull-up resistors are activate d. the port h pins are tri-stated when a reset condition becomes active, even if the clock is not running. port h also serves the functions of various special features of th e atmega3250a/3250pa/6450a/6450p as listed on page 76 .
8 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 2.3.11 port j (pj6:pj0) port j is a 7-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port j output buffers have symmetrical drive characteristics wi th both high sink and source capabilit y. as inputs, port j pins that are externally pulled low will source current if the pull-up resi stors are activated. the port j pins are tri-stated when a reset condition becomes active, even if the clock is not running. port j also serves the functions of various special features of th e atmel atmega3250a/3250pa/6450a/6450p as listed on page 78 . 2.3.12 reset reset input. a low le vel on this pin for longer than the minimum pulse le ngth will generate a reset, even if the clock is not running. the minimum pulse length is given in table 28-13 on page 297 . shorter pulses are not guaranteed to generate a reset. 2.3.13 xtal1 input to the inverting oscillato r amplifier and input to the in ternal clock operating circuit. 2.3.14 xtal2 output from the invert ing oscillator amplifier. 2.3.15 avcc avcc is the supply voltage pin for port f and the a/d converter. it should be externally connected to v cc , even if the adc is not used. if the adc is used, it should be connected to v cc through a low-pass filter. 2.3.16 aref this is the analog reference pin for the a/d converter.
9 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3. ordering information 3.1 atmega165a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel 5. see characterization specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 16 1.8 - 5.5v atmega165a-au atmega165a-aur (4) atmega165a-mu atmega165a-mur (4) ATMEGA165A-MCH ATMEGA165A-MCHr (4) 64a 64a 64m1 64m1 64mc 64mc industrial (-4 0 ? c to 85 ? c) atmega165a-an atmega165a-anr (4) atmega165a-mn atmega165a-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf) 64mc 64-lead (2-row staggered), 7 x 7 x 1.0 mm body, 4.0 x 4.0mm exposed pad, quad flat no-lead package (qfn)
10 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.2 atmega165pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel. 5. see characterization specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 16 1.8 - 5.5v atmega165pa-au atmega165pa-aur (4) atmega165pa-mu atmega165pa-mur (4) atmega165pa-mch atmega165pa-mchr (4) 64a 64a 64m1 64m1 64mc 64mc industrial (-4 0 ? c to 85 ? c) atmega165pa-an atmega165pa-anr (4) atmega165pa-mn atmega165pa-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf) 64mc 64-lead (2-row staggered), 7 x 7 x 1.0mm body, 4.0 x 4. 0 mm exposed pad, quad flat no-lead package (qfn)
11 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.3 atmega325a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel 5. see characterizations specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega325a-au atmega325a-aur (4) atmega325a-mu atmega325a-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) atmega325a-an atmega325a-anr (4) atmega325a-mn atmega325a-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf)
12 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.4 atmega325pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel 5. see characterization specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega325pa-au atmega325pa-aur (4) atmega325pa-mu atmega325pa-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) atmega325pa-an atmega325pa-anr (4) atmega325pa-mn atmega325pa-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf)
13 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.5 atmega3250a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel 5. see characterization specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega3250a-au atmega3250a-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) atmega3250a-an atmega3250a-anr (4) 100a 100a extended (-4 0 ? c to 105 ? c) (5) package type 100a 100-lead, 14 x 14 x 1.0mm, 0.5m m lead pitch, thin profile pl astic quad flat package (tqfp)
14 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.6 atmega3250pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel 5. see characterization specifications at 105c. speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega3250pa-au atmega3250pa-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) atmega3250pa-an atmega3250pa-anr (4) 100a 100a extended (-4 0 ? c to 105 ? c) (5) package type 100a 100-lead, 14 x 14 x 1.0mm, 0.5m m lead pitch, thin profile pl astic quad flat package (tqfp)
15 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.7 atmega645a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega645a-au atmega645a-aur (4) atmega645a-mu atmega645a-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf)
16 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.8 atmega645p notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega645p-au atmega645p-aur (4) atmega645p-mu atmega645p-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) package type 64a 64-lead, thin (1.0mm) plastic gull w ing quad flat package (tqfp) 64m1 64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf)
17 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.9 atmega6450a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega6450a-au atmega6450a-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) package type 100a 100-lead, 14 x 14 x 1.0mm, 0.5m m lead pitch, thin profile pl astic quad flat package (tqfp)
18 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 3.10 atmega6450p notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 28-1 on page 295 . 4. tape & reel speed (mhz) (3) power supply ordering code (2) package (1) operation range 20 1.8 - 5.5v atmega6450p-au atmega6450p-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) package type 100a 100-lead, 14 x 14 x 1.0mm, 0.5m m lead pitch, thin profile pl astic quad flat package (tqfp)
19 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 4. packaging information 4.1 64a 2325 orchard parkway san jose, ca 95131 title drawing no. rev. 64a, 64-lead, 14 x 14mm body size, 1.0mm body thickness, 0.8mm lead pitch, thin profile plastic quad flat package (tqfp) c 64a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b common dimen s ion s (unit of measure = mm) s ymbol min nom max note notes: 1.this package conforms to jedec reference ms-026, variation aeb. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.10mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.30 ? 0.45 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.80 typ 2325 orchard parkway san jose, ca 95131 title drawing no. rev. 64a, 64-lead, 14 x 14mm body size, 1.0mm body thickness, 0.8mm lead pitch, thin profile plastic quad flat package (tqfp) c 64a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b common dimen s ion s (unit of measure = mm) s ymbol min nom max note notes: 1.this package conforms to jedec reference ms-026, variation aeb. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.10mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.30 ? 0.45 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.80 typ
20 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 4.2 64m1 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 64m1 , 64-pad, 9 x 9 x 1.0 mm body, lead pitch 0.50 mm, h 64m1 2010-10-19 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 ? 0.02 0.05 b 0.18 0.25 0.30 d d2 5.20 5.40 5.60 8.90 9.00 9.10 8.90 9.00 9.10 e e2 5.20 5.40 5.60 e 0.50 bsc l 0.35 0.40 0.45 notes: 1. jedec standard mo-220, (saw singulation) fig. 1, vmmd. 2. dimension and tolerance conform to asmey14.5m-1994. top view s ide view bottom view d e marked pin# 1 id seating plane a1 c a c 0.08 1 2 3 k 1.25 1.40 1.55 e2 d2 b e pin #1 corner l pin #1 triangle pin #1 chamfer (c 0.30) option a option b pin #1 notch (0.20 r) option c k k 5.40 mm exposed pad, micro lead frame package (mlf) 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 64m1 , 64-pad, 9 x 9 x 1.0 mm body, lead pitch 0.50 mm, h 64m1 2010-10-19 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 ? 0.02 0.05 b 0.18 0.25 0.30 d d2 5.20 5.40 5.60 8.90 9.00 9.10 8.90 9.00 9.10 e e2 5.20 5.40 5.60 e 0.50 bsc l 0.35 0.40 0.45 notes: 1. jedec standard mo-220, (saw singulation) fig. 1, vmmd. 2. dimension and tolerance conform to asmey14.5m-1994. top view s ide view bottom view d e marked pin# 1 id seating plane a1 c a c 0.08 1 2 3 k 1.25 1.40 1.55 e2 d2 b e pin #1 corner l pin #1 triangle pin #1 chamfer (c 0.30) option a option b pin #1 notch (0.20 r) option c k k 5.40 mm exposed pad, micro lead frame package (mlf)
21 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 4.3 64mc title drawing no. gpc rev. packa g e drawin g contact: packagedrawings@atmel.com 64mc zxc a 64mc, 64qfn (2-row staggered), 7 x 7 x 1.00 mm body, 4.0 x 4.0 mm exposed pad, quad flat no lead package 10/3/07 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 0.00 0.02 0.05 b 0.18 0.23 0.28 c 0.20 ref d 6.90 7.00 7.10 d2 3.95 4.00 4.05 e 6.90 7.00 7.10 e2 3.95 4.00 4.05 et ? 0.65 ? er ? 0.65 ? k 0.20 ? ? (ref) l 0.35 0.40 0.45 y 0.00 ? 0.075 s ide view top view bottom view note: 1. the terminal #1 id is a laser-marked feature . pin 1 id d e a1 a y c et/2 r0.20 0.40 b1 a1 b30 a34 b a8 b7 et d2 b16 a18 b22 a25 e2 k (0.1) ref b8 a9 (0.18) ref l b15 a17 l er a26 b23 et
22 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 4.4 100a 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 100a, 100-lead, 14 x 14mm body size, 1.0mm body thickness, 0.5mm lead pitch, thin profile plastic quad flat package (tqfp) d 100a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.17 ? 0.27 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.50 typ notes: 1. this package conforms to jedec reference ms-026, variation aed. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.08mm maximum. common dimen s ion s (unit of measure = mm) s ymbol min nom max note
23 atmega165a/pa/325a/pa/3250a/pa/ 645a/p/6450a/p [summary] 8285es?avr?02/2013 5. errata 5.1 atmega165a/165pa/325a/ 325pa/3250a/3250pa/645a/645 p/6450a/6450p rev. g no known errata. 5.2 atmega165a/165pa/325a/325p a/3250a/3250pa/645a/645p/6 450a/6450p rev. a to f not sampled.
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